In general, in producing a TFT (Thin Film Transistor), a thick insulating protective film (organic resin film in general) is laminated on data wiring lines/terminal wiring lines and then a conductive film (transparent electrode film) pattern is formed in an upper layer of the thick insulating protective film.
FIG. 20 is a cross sectional view illustrating an ideal TFT panel 300 which would be produced in a production method including the film formation and pattern formation step as above. FIG. 21 is a schematic view illustrating the TFT panel 300 viewed directly from above. FIG. 22 is a cross sectional view illustrating the TFT panel 300 taken along A-B in FIG. 21. These drawings show that individual ones of data wiring lines/terminal wiring lines 7 are electrically insulated from each other. As illustrated in FIGS. 20 through 22, it is ideal that individual ones of the data wiring lines/terminal wiring lines 7 of the TFT panel 300 are electrically insulated from each other.
However, in reality, in a case of a conventional TFT panel having the same configuration as that of the ideal TFT panel 300, when a thick insulating protective film 8 is stacked on the data wiring lines/terminal wiring lines 7 and a pattern of a transparent electrode film 9 is formed on the thick insulating protective film 8, a current leakage path tends to be formed between the data wiring lines/terminal wiring lines 7.
FIGS. 23 through 25 each illustrate an example of a conventional TFT panel 200 which is produced in practice in a TFT array step in which the thick insulating protective film 8 is stacked. FIGS. 23 through 25 correspond to FIGS. 20 through 22, respectively. FIG. 23 is a cross sectional view illustrating the TFT panel 200. FIG. 24 is a schematic view illustrating the TFT panel 200 viewed directly from above. FIG. 25 is a cross sectional view illustrating the TFT panel 200 taken along A-B in FIG. 24.
As illustrated in FIGS. 23 through 25, lamination of the thick insulating protective film 8 on the data wiring lines/terminal wiring lines 7 tends to consequently leave a transparent electrode film residue 91 along a pattern edge 81 of the insulating protective film 8. In a case where the transparent electrode film residue 91 remains between the data wiring lines/terminal wiring lines 7 which are not covered with the insulating protective film 8, the transparent electrode film residue 91 forms a current leakage circuit. This causes an electric short-circuit between the data wiring lines/terminal wiring lines 7.
FIGS. 26 through 28 are views illustrating a cause for the transparent electrode film residue 91 which is formed between the data wiring lines/terminal wiring lines 7 and along the pattern edge 81 of the insulating protective film 8. FIG. 26 is a cross sectional view illustrating a state immediately after formation of a transparent electrode film 90 on the thick insulating protective film 8. FIG. 27 is a cross sectional view illustrating a state where a resist is applied onto the transparent electrode film 90 after the state illustrated in FIG. 26. FIG. 28 is a cross sectional view illustrating a state where a residue of the applied resist remains along the pattern edge of the insulating protective film 8.
As illustrated in FIG. 26, when the transparent electrode film 90 is formed, a portion of the transparent electrode film 90 tends to become thick along a height direction H at the pattern edge 81 of the insulating protective film 8. In a case where the portion along the height direction H becomes thick, pattern etching cannot completely remove an unnecessary portion of the transparent electrode film 90 which portion is between the data wiring lines/terminal wiring lines 7. This results in the transparent electrode film residue 91 after the pattern etching.
Similarly, as illustrated in FIG. 27, in a photolithograph step of forming a transparent electrode film pattern, a portion of the applied resist has a large thickness along the height direction of the insulating protective film 8, as with the transparent electrode film 90. Consequently, as illustrated in FIG. 28, exposure to that portion becomes insufficient, which results in residue of the resist after development. The residue of the resist results in the transparent electrode film residue 91 after etching.
The transparent electrode film residue 91 forms a current leakage circuit between the data wiring lines/terminal wiring lines 7 which are not covered with the insulating protective film 8, because of what is described with reference to FIG. 26 and what is described with reference to FIGS. 27 and 28.
The above description has discussed (i) the transparent electrode film residue 91 which is formed along the pattern edge 81 of the insulating protective film 8 and (ii) formation of a current leakage path between the data wiring lines/terminal wiring lines 7 by the transparent electrode film residue 91. The above description uses, as an example, a top-gate structure TFT panel.
However, the problems of (i) the transparent electrode film residue 91 which is formed along the pattern edge 81 of the insulating protective film 8 and (ii) formation of a current leakage path between the data wiring lines/terminal wiring lines 7 by the transparent electrode film residue 91 are not limited to the top-gate structure TFT panel.
FIG. 19 is a cross sectional view illustrating a structure of an ideal bottom-gate structure TFT panel 400.
As can be seen from the shape of an insulating protective film 8 in the TFT panel 400, the bottom-gate structure TFT panel 400 also tends to have a transparent electrode film residue 91 along a pattern edge 81 of the insulating protective film 8. That is, the problems of (i) formation of the transparent electrode film residue 91 and (ii) formation of a current leakage path between the data wiring lines/terminal wiring lines 7 by the transparent electrode film residue 91 also occur in the bottom-gate structure TFT panel.
As such, various measures have been taken in order to prevent data wiring lines/terminal wiring lines from being electrically short-circuited even when an insulating protective film is deposited to have a large thickness.
Patent Literature 1 below discloses a technique for preventing a short-circuit between the mounted terminals. In this technique, an end of an interlayer insulating film between mounted terminals is formed to have a protruding shape, so that residue of a pixel electrode material at a pattern edge portion is reduced and thereby, the short-circuit between the mounted terminals is prevented.
Patent Literature 2 discloses a technique in which a photomask for forming an interlayer insulating film is designed to have a light-blocking pattern which blocks light from an exposing device, an opening pattern which allows the light to pass, and a boundary pattern which is between the light-blocking pattern and the opening pattern and which has a pitch smaller than a resolution of the exposing device. Patent Literature 2 is intended to prevent an electric short-circuit caused by a residue of a pixel electrode between adjacently mounted terminals at an end of the gate insulating film, by making an inclination angle gentle at an end of the insulating film with use of the above photomask.
Patent Literature 3 discloses a substrate device including a single-layered pattern film which is formed on a substrate and which has a side surface section. The side surface section is formed to have a plurality of inclination angles with respect to a surface of the substrate or the side surface section is formed to have a step-like form.